1. Field of the Invention
Apparatuses and methods consistent with the present invention relate to correcting an asymmetric waveform level, and more particularly to correcting an asymmetric waveform level in consideration of an asymmetric error after the decimal point.
2. Description of the Related Art
In an optical disc system including a compact disc (CD) and a digital versatile disc (DVD), an up-down symmetry of an RF signal, which is outputted from the disc, centering around a reference level is destroyed due to an error occurring in the manufacturing process of the disc. If such an asymmetric waveform is produced, it is difficult to find the center value of the waveform and this causes a restoration of data without error to become difficult.
Also, a defect in the RF signal may occur due to a defect in the optical disc such as scratch, user's fingerprint and dust on the surface of the optical disk. Thus, it is necessary to correct the above-described asymmetric waveform and defect.
FIG. 1 shows a circuit for detecting an asymmetric signal (e.g., DC-offset) using a digital sum value (DSV) algorithm. Referring to FIG. 1, the circuit for detecting and correcting an asymmetry of a reproduced signal during the reproduction of an optical disc has the construction that reads data from an optical disc by irradiating laser onto the surface of the disc and converting the strength of light reflected from the disc surface into an electric signal. The electric signal read out from the disc, which is called an RF signal, is converted into a binary signal and then is used for the desired purpose through a demodulation process. In manufacturing the optical disc, an upper waveform period of the RF signal around an intermediate level of the RF waveform may be different from a lower waveform period of the RF signal due to an error occurring in the disc manufacturing process. To correct this, a conventional DSV control system includes a corrector 100, a comparator 120 and a counter 140. The corrector 100 corrects the signal level of the error, and the comparator 120 decides the polarity (e.g., + or −) of specified threshold values.
FIG. 2 shows a principle of a counter operation in a DSV algorithm. The operation of the conventional asymmetric signal detection circuit will be explained with reference to FIGS. 1 and 2.
First, the asymmetric signal detection circuit decides and accumulates a first interpolated signal (i.e., average value of two sample signals) of analog-to-digital (A/D) converted sample signals as a polarity value. Then, the circuit operates a counter 140 to calculate the asymmetry of the signal using the accumulated value. The circuit also judges the polarity of the asymmetric signal and corrects the signal through an up-down correction whenever the continuously accumulated signal exceeds a predetermined threshold value, and then resets the counter 140.
The above-described correction using the DSV method can achieve a stable operation without being effected by an amount of asymmetric polarity and a timing error value. However, in the conventional DSV method, a phase locked loop (PLL) cannot properly operate if a 3T (T: sampling period) or 4T signal, which frequently occurs in a CD/DVD/BD system in which a frequency error occurs, appears successively. That is, the counter 140, which performs ± up/down operation by deciding the polarity with reference to a sign, becomes unable to perform a fine asymmetric estimation, and this causes the PLL to be unable to operate properly, thereby making data restoration impossible.